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fact-depend
binwalk
Commits
96761662
Commit
96761662
authored
Sep 30, 2014
by
devttys0
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Plain Diff
Updated disasm for reliability, updated vxworks symbol table signature
parent
76ff729a
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Showing
4 changed files
with
17 additions
and
2 deletions
+17
-2
__init__.py
src/binwalk/modules/__init__.py
+4
-1
disasm.py
src/binwalk/modules/disasm.py
+0
-0
general.py
src/binwalk/modules/general.py
+1
-1
firmware
src/magic/firmware
+12
-0
No files found.
src/binwalk/modules/__init__.py
View file @
96761662
...
@@ -7,4 +7,7 @@ from binwalk.modules.extractor import Extractor
...
@@ -7,4 +7,7 @@ from binwalk.modules.extractor import Extractor
from
binwalk.modules.entropy
import
Entropy
from
binwalk.modules.entropy
import
Entropy
from
binwalk.modules.heuristics
import
HeuristicCompressionAnalyzer
from
binwalk.modules.heuristics
import
HeuristicCompressionAnalyzer
from
binwalk.modules.compression
import
RawCompression
from
binwalk.modules.compression
import
RawCompression
#from binwalk.modules.codeid import CodeID
try
:
from
binwalk.modules.disasm
import
Disasm
except
ImportError
:
pass
src/binwalk/modules/
codeid
.py
→
src/binwalk/modules/
disasm
.py
View file @
96761662
This diff is collapsed.
Click to expand it.
src/binwalk/modules/general.py
View file @
96761662
...
@@ -37,7 +37,7 @@ class General(Module):
...
@@ -37,7 +37,7 @@ class General(Module):
Option
(
long
=
'continue'
,
Option
(
long
=
'continue'
,
short
=
'k'
,
short
=
'k'
,
kwargs
=
{
'keep_going'
:
True
},
kwargs
=
{
'keep_going'
:
True
},
description
=
'Show all matches for every offset, not just the first'
),
description
=
"Don't stop at the first match"
),
Option
(
long
=
'swap'
,
Option
(
long
=
'swap'
,
short
=
'g'
,
short
=
'g'
,
type
=
int
,
type
=
int
,
...
...
src/magic/firmware
View file @
96761662
...
@@ -584,7 +584,9 @@
...
@@ -584,7 +584,9 @@
# Signatures to identify the start of a VxWorks symbol table
# Signatures to identify the start of a VxWorks symbol table
8 string \x00\x00\x05\x00\x00\x00\x00\x00 VxWorks symbol table, big endian,
8 string \x00\x00\x05\x00\x00\x00\x00\x00 VxWorks symbol table, big endian,
>4 belong 0 invalid
>4 belong x first entry: [type: function, code address: 0x%X,
>4 belong x first entry: [type: function, code address: 0x%X,
>0 belong 0 invalid
>0 belong x symbol address: 0x%X]{display-once}
>0 belong x symbol address: 0x%X]{display-once}
>24 belong !0x500
>24 belong !0x500
>>24 belong !0x700
>>24 belong !0x700
...
@@ -600,7 +602,9 @@
...
@@ -600,7 +602,9 @@
>>>72 belong !0x900 \b, invalid
>>>72 belong !0x900 \b, invalid
8 string \x00\x00\x07\x00\x00\x00\x00\x00 VxWorks symbol table, big endian,
8 string \x00\x00\x07\x00\x00\x00\x00\x00 VxWorks symbol table, big endian,
>4 belong 0 invalid
>4 belong x first entry: [type: initialized data, code address: 0x%X,
>4 belong x first entry: [type: initialized data, code address: 0x%X,
>0 belong 0 invalid
>0 belong x symbol address: 0x%X]{display-once}
>0 belong x symbol address: 0x%X]{display-once}
>24 belong !0x500
>24 belong !0x500
>>24 belong !0x700
>>24 belong !0x700
...
@@ -616,7 +620,9 @@
...
@@ -616,7 +620,9 @@
>>>72 belong !0x900 \b, invalid
>>>72 belong !0x900 \b, invalid
8 string \x00\x00\x09\x00\x00\x00\x00\x00 VxWorks symbol table, big endian,
8 string \x00\x00\x09\x00\x00\x00\x00\x00 VxWorks symbol table, big endian,
>4 belong 0 invalid
>4 belong x first entry: [type: uninitialized data, code address: 0x%X,
>4 belong x first entry: [type: uninitialized data, code address: 0x%X,
>0 belong 0 invalid
>0 belong x symbol address: 0x%X]{display-once}
>0 belong x symbol address: 0x%X]{display-once}
>24 belong !0x500
>24 belong !0x500
>>24 belong !0x700
>>24 belong !0x700
...
@@ -632,7 +638,9 @@
...
@@ -632,7 +638,9 @@
>>>72 belong !0x900 \b, invalid
>>>72 belong !0x900 \b, invalid
8 string \x00\x05\x00\x00\x00\x00\x00\x00 VxWorks symbol table, little endian,
8 string \x00\x05\x00\x00\x00\x00\x00\x00 VxWorks symbol table, little endian,
>4 lelong 0 invalid
>4 lelong x first entry: [type: function, code address: 0x%X,
>4 lelong x first entry: [type: function, code address: 0x%X,
>0 lelong 0 invalid
>0 lelong x symbol address: 0x%X]{display-once}
>0 lelong x symbol address: 0x%X]{display-once}
>24 lelong !0x500
>24 lelong !0x500
>>24 lelong !0x700
>>24 lelong !0x700
...
@@ -648,7 +656,9 @@
...
@@ -648,7 +656,9 @@
>>>72 lelong !0x900 \b, invalid
>>>72 lelong !0x900 \b, invalid
8 string \x00\x07\x00\x00\x00\x00\x00\x00 VxWorks symbol table, little endian,
8 string \x00\x07\x00\x00\x00\x00\x00\x00 VxWorks symbol table, little endian,
>4 lelong 0 invalid
>4 lelong x first entry: [type: initialized data, code address: 0x%X,
>4 lelong x first entry: [type: initialized data, code address: 0x%X,
>0 lelong 0 invalid
>0 lelong x symbol address: 0x%X]{display-once}
>0 lelong x symbol address: 0x%X]{display-once}
>24 lelong !0x500
>24 lelong !0x500
>>24 lelong !0x700
>>24 lelong !0x700
...
@@ -664,7 +674,9 @@
...
@@ -664,7 +674,9 @@
>>>72 lelong !0x900 \b, invalid
>>>72 lelong !0x900 \b, invalid
8 string \x00\x09\x00\x00\x00\x00\x00\x00 VxWorks symbol table, little endian,
8 string \x00\x09\x00\x00\x00\x00\x00\x00 VxWorks symbol table, little endian,
>4 lelong 0 invalid
>4 lelong x first entry: [type: uninitialized data, code address: 0x%X,
>4 lelong x first entry: [type: uninitialized data, code address: 0x%X,
>0 lelong 0 invalid
>0 lelong x symbol address: 0x%X]{display-once}
>0 lelong x symbol address: 0x%X]{display-once}
>24 lelong !0x500
>24 lelong !0x500
>>24 lelong !0x700
>>24 lelong !0x700
...
...
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